Lichen CPU manual

Conventions

Except for what is noted below, all measurement units follow IEEE 1541.
All numbers are in decimal unless prefixed with '0x', in which case they are in hexadecimal.

unit example description
w 12w word: a word is 2 bytes
dw 44dw double word, 4 bytes

Memory map

start end size type description
0x0 0x1FF 512B SFR Special function registers
0x200 0x11FF 4KiB RAM Chip RAM, startup entry point @ 0x200
0x1200 0xFFFF 59.5KiB RAM Extent of lower memory region
0x10000 0xFFFFFFFF 4.05GiB RAM Extent of upper memory region

SFR Map

r denotes 'read', 'w' denotes 'write'
a '-,-' in the access column signifies that the user should not read or write to that address
reads and writes to reserved SFRs are undefined. Writes to SFRs that do not specify write capability are ignored. Reads to SFRs that do not specify read capability return 0. Reads or writes to undefined SFRs result in processor exception pxnRWIllegalSFR.

address size access name description
0 1B r,w sfrInvalid invalid SFR
1 1B r,w sfrChipCon0 chip configuration register
2 1B r,w sfrChipCon1 chip configuration register
3 1B r,w sfrChipCon2 chip configuration register
4 1B r,w sfrChipCon3 chip configuration register
5 4B -,- Reserved reserved for chip config expansion
?? 2B r,w sfrIntMask interrupt mask
?? 2B r,w sfrHighAddr High memory register. This is how we address 4GiB of space with 64KiB banks
?? 1b r,w sfrLSFP Locals stack frame pointer
?? 1b r,w sfrException Exception code
?? 1b r,- srfOverflow Overflow status for last instruction
?? 1b r,w sfrException Exception code
?? 16w r,w hIVT Hardware interrupt vector table

Opcode tables

Size is total of opcode + immediate. Immediate is located in memory directly after the opcode.
base opcode size is one byte. Most opcodes have no immediate.

fielddescription
dunsigned general data
ssigned general data
a address
b boolean
o offset
signed root immediate width
a instruction i b

Arithmetic instructions

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5 description
←D Stack→ ←A Stack→ ←Immediate→
←In→ ←Out→ ←In→ ←Out→
add d d d 0x00 unsigned addition
sub d d d 0x00 unsigned subtraction
div d d d 0x00 unsigned division
mul d d d 0x00 unsigned multiplication
sadd d d d 0x00 signed addition
ssub d d d 0x00 signed subtraction
sdiv d d d 0x00 signed division
smul d d d 0x00 signed multiplication

Bitwise Instructions

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5 description
←D Stack→ ←A Stack→ ←Immediate→
←In→ ←Out→ ←In→ ←Out→
and d d d 0x00 and
or d d d 0x00 or
xor d d d 0x00 exclusive or
not d d 0x00 not
bsl d d 0x00 shift left
bsr d d 0x00 shift right
sbsl d d 0x00 signed shift left
sbsr d d 0x00 signed shift right
bsnl o d d 0x00 shift left n bits
bsnr o d d 0x00 shift right n bits
sbsnl o d d 0x00 signed shift left n bits
sbsnr o d d 0x00 signed shift right n bits
rotl d d 0x00 rotate bits left
rotr d d 0x00 rotate bits right

Stack Instructions

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5 description
←D Stack→ ←A Stack→ ←Immediate→
←In→ ←Out→ ←In→ ←Out→
nop 0x00 no operation
inc d d 0x00 increment
dec d d 0x00 decrement
drop d 0x00 drop
dropa d 0x00 drop address
swap d d d d 0x00 swap
roll d d d d d d 0x00 roll
a2d d d 0x00 address to data
d2a d d 0x00 data to address
dup d d d 0x00 duplicate
push d 0x00 ←d→ push
pushb d 0x00 d push byte
spushb d 0x00 d signed push byte
pusha d 0x00 ←d→ push address

Memory Instructions

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5 description
←D Stack→ ←A Stack→ ←Immediate→
←In→ ←Out→ ←In→ ←Out→
store a d 0x00 store word B at address A
storei d 0x00 ←a→ store word A at immediate address
storeil d 0x00 ←o→ store word A at immediate offset from locals frame pointer
storeb a d 0x00 store byte B at address A
storeib d 0x00 ←a→ store byte A at immediate address
storeibl d 0x00 ←o→ store byte A at immediate offset from locals frame pointer
fetch a d 0x00 fetch word from address A
fetchb a d 0x00 fetch byte from address A
sfetchb a s 0x00 ftech signed byte at address A
incm a 0x00 increment word in memory at address A
incmb a 0x00 increment byte in memory at address A
decm a 0x00 decrement word in memory at address A
decmb a 0x00 decrement byte in memory at address A
bfetch a o 0x00 fetch bit at offset B from word in memory at address A
bfetchb a o 0x00 fetch bit at offset B from byte in memory at address A

Logical Instructions

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5 description
←D Stack→ ←A Stack→ ←Immediate→
←In→ ←Out→ ←In→ ←Out→
equal d d b 0x00 (unsigned) A equal B
less d d b 0x00 (unsigned) A less than B
great d d b 0x00 (unsigned) A greater than B
equalm d b 0x00 ←a→ (unsigned) A equal word in memory
lessm d b 0x00 ←a→ (unsigned) A less than word in memory
greatm d b 0x00 ←a→ (unsigned) A greater than word in memory
equalmb d b 0x00 ←a→ (unsigned) A equal byte in memory
lessmb d b 0x00 ←a→ (unsigned) A less than byte in memory
greatmb d b 0x00 ←a→ (unsigned) A greater than byte in memory
equali d b 0x00 ←d→ (unsigned) A equal immediate word
lessi d b 0x00 ←d→ (unsigned) A less than immediate word
greati d b 0x00 ←d→ (unsigned) A greater than immediate word
sless s s b 0x00 (signed) A less than B
sgreat s s b 0x00 (signed) A greater than B
slessm s b 0x00 ←a→ (signed) A less than word in memory
sgreatm s b 0x00 ←a→ (signed) A greater than word in memory
slessmb s b 0x00 ←a→ (signed) A less than byte in memory
sgreatmb s b 0x00 ←a→ (signed) A greater than byte in memory
slessi s b 0x00 ←d→ (signed) A less than immediate word
sgreati s b 0x00 ←d→ (signed) A greater than immediate word

Branch Instructions

no relative branching yet
Thinking about adding conditional branches based on a specified bit in a word or byte

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5 description
←D Stack→ ←A Stack→ ←Immediate→
←In→ ←Out→ ←In→ ←Out→
call a a 0x0 call
callt a b a 0x0 call if true
callf a b a 0x0 call if false
calli a 0x0 ←a→ call immediate
callitb a 0x0 ←a→ call immediate if true
callifb a 0x0 ←a→ call immediate if false
jmp a 0x0 jump
jmpt a b 0x0 jump if true
jmpf a b 0x0 jump if false
jmpi 0x0 ←a→ jump immediate
jmpit b 0x0 ←a→ jump immediate if true
jmpif b 0x0 ←a→ jump immediate if false
ret a 0x0 return

Control Instructions

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5 description
←D Stack→ ←A Stack→ ←Immediate→
←In→ ←Out→ ←In→ ←Out→
halt 0x0 halt execution until physical reset
reset 0x0 reset the machine

Processor Exception Table

When a processor exception occurs, the data stack is cleared. IP is then pushed onto the data stack then the exception code is pushed onto the data stack. IP is then assigned to vector 0 of the software IVT.

code label description
0x0 pxnRWIllegalSFR A read or write operation targeted an undefined SFR
0x1 pxnDivZero Division by zero
0x2 pxnDStackOverflow Data stack overflow
0x3 pxnDStackUnderflow Data stack underflow
0x4 pxnAStackOverflow Address stack overflow
0x5 pxnAStackUnderflow Address stack overflow
0x6 pxnIllegalCall Execution jumped into SFR space, which is not permitted
0x7 pxnIllegalOpcode Tried to decode an undefined opcode

Startup procedure

On power up or reset, the processor will interrogate the first SPI block and look for a serial eeprom. If it finds one and the eeprom contains a program signature, it copies the program from the eeprom into memory starting at address 0x200 and then begins execution there. If no eeprom with a viable program is found, the processor copies a debug monitor program from a private, unaddressable ROM into memory at address 0x200 and beings execution. The debug monitor program establishes communication with SerialPort0 at 19200 baud.

Instruction Set Reference

Conventions

General:
Unless otherwise specified, all discussion involving stacks are referring to the data stack.

Regarding descriptions:
Stack elements are referred to by 'A', 'B' and 'C'. Element A is the top of the stack. Element B is below element A and element C is below element B. When a set of elements is presented in an ordered list, said list is read left to right with the left most element being the top of the stack (element 'A') and going down towards the bottom of the stack.

Regarding test cases:
All test cases start off with an empty stack. Elements are pushed onto the stack if necessary to demonstrate functionality. In general, correct usage is presented first and then followed by examples that generate processor exceptions.

Arithmetic Instructions

add

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
add d d d 0x0

Description: Unsigned integer addition.

This instruction computes A + B and the result is placed on the data stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 12 push 3 add -> 15
Test case: push 4 add -> data stack underflow 
Test case: add -> data stack underflow 

sub

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
sub d d d 0x0

Description: Unsigned integer subtraction

This instruction computes A - B and returns the result on the data stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 9 push 3 sub -> 6
Test case: push 18 sub -> data stack underflow 
Test case: sub -> data stack underflow 

div

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
div d d d 0x0

Description: Unsigned integer division.

This instruction computes A / B and returns the result on the stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 100 push 50 div -> 2
Test case: push 38 div -> data stack underflow 
Test case: div -> data stack underflow 

mul

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
mul d d d 0x0

Description: Unsigned integer multiplication.

This instruction computes A * B and returns the result on the data stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 14 push 7 mul -> 98
Test case: push 937 mul -> data stack underflow 
Test case: mul -> data stack underflow 

sadd

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
sadd d d d 0x0

Description: Signed integer addition.

This instruction computes A + B and returns the result on the data stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 12 push 3 add -> 15
Test case: push 4 add -> data stack underflow 
Test case: add -> data stack underflow 

ssub

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
sub d d d 0x0

Description: Signed integer subtraction

This instruction computes A - B and returns the result on the data stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 9 push 3 sub -> 6
Test case: push 18 sub -> data stack underflow 
Test case: sub -> data stack underflow 

sdiv

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
sdiv d d d 0x0

Description: Signed integer division.

This instruction computes A / B and returns the result on the stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 100 push 50 div -> 2
Test case: push 38 div -> data stack underflow 
Test case: div -> data stack underflow 

smul

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
smul d d d 0x0

Description: Signed integer multiplication.

This instruction computes A * B and returns the result on the data stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 14 push 7 mul -> 98
Test case: push 937 mul -> data stack underflow 
Test case: mul -> data stack underflow 

Bitwise Instructions

and

Instruction Breakdown:

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
and d d d 0x0

Description: Bitwise AND.

This instruction computes A AND B and returns the result on the data stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 5383 push 6032 and -> 5376
Test case: push 3297 and -> data stack underflow
Test case: and -> data stack underflow

or

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
or d d d 0x0

Description: Bitwise OR.

This instruction computes A OR B and returns the result onto the data stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 7338 push 1694 or -> 7870
Test case: push 347 or -> data stack underflow
Test case: or -> data stack underflow

xor

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
xor d d d 0x0

Description: Bitwise exclusive OR.

This instruction computes A XOR B and returns the result onto the data stack.

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 9323 push 6725 xor -> 15918
Test case: push 3492 xor -> data stack underflow
Test case: xor -> data stack underflow

not

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
not d d 0x0

Description: Bitwise NOT

This instruction computes NOT A and returns the result onto the data stack.

If the stack is empty when this instruction is executed, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 4836 not -> 60699
Test case: not -> data stack underflow

bsl

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
bsl o d d 0x0

Description: Unsigned bit shift left.

This instruction shifts B left by the number of bits specified in A[12:15].

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: xxxxx
Test case: xxxxx

bsr

nem iaibicoaobociaibicoaoboccodei0i1i2i3i4i5
←In→ ←Out→ ←In→ ←Out→
←D Stack→ ←A Stack→ ←Immediate→
bsr o d d 0x0

Description: Unsigned bit shift right.

This instruction shifts B right by the number of bits specified in A[12:15].

If there are 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 4836 not -> 60699
Test case: not -> data stack underflow

Stack Instructions

nop

Instruction Breakdown:

byte 0
0x8

Description: This instruction consumes no items from either stack and returns nothing. No operation is performed. One machine cycle is consumed.

Test case: nop -> nothing

inc

Instruction Breakdown:

byte 0
0x9

Description: This instruction consumes one items from the data stack and returns one item on the data stack. The result is stack element A plus one. If 0xFFFF is the element before the increment, the result is 0x0. If the stack is empty when this instruction is executed a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 0xFFFF inc -> 0
Test case: push 9 inc -> 10 
Test case: inc -> data stack underflow

dec

byte 0
0xA

Description: This instruction consumes one items from the data stack and returns one item on the data stack. The result is stack element A minus one. If 0 is the element before the decrement, the result is 0xFFFF. If the stack is empty when this instruction is executed a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 0 dec -> 0xFFFF
Test case: push 44 dec -> 43 
Test case: dec -> data stack underflow

drop

byte 0
0xB

Description: This instruction consumes one items from the data stack and returns no items. The result is whatever value was previously stack element B. If there was only one stack element on the data stack, the data stack will be empty after executing this instruction. If the stack was empty prior to calling this instruction then a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 1 push 2 push 3 drop -> stack contents: 1, 2
Test case: (empty stack) drop -> data stack underflow 

swap

byte 0
0xC

Description: This instruction consumes two items from the data stack and returns two items on the data stack. The result is stack element A and stack element B switch positions. If there is 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 8 push 77 swap -> stack contents: 8, 77 
Test case: push 9 swap -> data stack underflow
Test case: swap -> data stack undeflow 

roll

byte 0
0xD

Description: This instruction consumes three items from the data stack and returns three items on the data stack. The result is stack element B takes stack the position of stack element C. Stack element A takes the position of stack element B. Stack element C takes the position of stack element A. If there 2, 1 or 0 elements on the stack, a data stack underflow error occurs with the code pxnDStackUnderflow.

Test case: push 1 push 2 push 3 roll -> stack contents: 1, 3, 2 
Test case: push 1 push 2 roll -> data stack underflow
Test case: push 1 roll -> data stack underflow 
Test case: roll -> data stack underflow

a2d

Instruction Breakdown:

byte 0
0xE

Description: This instruction consumes one item from the address stack and returns one item on the data stack. The result is data stack element A equals what ever was on the top of the address stack. If the address stack is empty when this instruction is called, an address stack underflow error occurs with the code pxnAStackUnderflow. If the data stack is full when this instruction is executed then a data stack overflow error occurs with the code pxnDStackOverflow.

Test case: (address stack = 0xff) a2d -> (data stack) 0xff

Test case: (address stack = empty) a2d -> address stack underflow
Test case: (address stack = 28) a2d -> (data stack full) data stack overflow

d2a

Instruction Breakdown:

byte 0
0xF

Description: This instruction consumes one item from the data stack and returns one item on the address stack. The result is address stack element A equals what ever was on the top of the data stack. If the data stack is empty when this instruction is called, a data stack underflow error occurs with the code pxnDStackUnderflow. If the address stack is full when this instruction is executed then an address stack overflow error occurs with the code pxnAStackOverflow.

Test case: (data stack = 0xf7) d2a -> (address stack) 0xf7
Test case: (data stack = empty) d2a -> data stack underflow
Test case: (data stack = 0x22) d2a -> (address stack full) address stack overflow

Memory Instructions

store

stores

fetch

fetchs

shoved

Instruction Breakdown:

byte 0 byte 1 byte 2
0x14 ←any data→ ←any data→

General description: Shove immediate word onto the data stack.

shoves

Instruction Breakdown:

byte 0 byte 1
0x15 ←any data→

General description: Shove immediate byte onto the data stack.

shovea

Instruction Breakdown:

byte 0 byte 1
0x16 ←any data→

Description: Shove immediate word onto the address stack.

Branch Instructions

equal

Instruction Breakdown:

byte 0
0x17

Description: This instruction consumes two items from the data stack and returns one item on the data stack. If stack element A is equal to stack element B then the return value is 1 else the return value is 0. If there is 1 or 0 items on the data stack when this instruction is called a data stack underflow error occurs with the code pxnDStackUnderflow

Test case: push 100 push 100 equal -> 1
Test case: push 100 push 200 equal -> 0
Test case: push 100 equal -> data stack underflow
Test case: equal -> data stack underflow

less

Instruction Breakdown:

byte 0
0x18

Description: This instruction consumes two items from the data stack and returns one item on the data stack. If stack element B is less than stack element A then the return value is 1 else the return value is 0. If there is 1 or 0 items on the data stack when this instruction is called a data stack underflow error occurs with the code pxnDStackUnderflow

Test case: push 45 push 104 less -> 1
Test case: push 6700 push 12 less -> 0
Test case: push 100 less -> data stack underflow
Test case: less -> data stack underflow

great

Instruction Breakdown:

byte 0
0x19

Description: This instruction consumes two items from the data stack and returns one item on the data stack. If stack element B is greater than stack element A then the return value is 1 else the return value is 0. If there is 1 or 0 items on the data stack when this instruction is called a data stack underflow error occurs with the code pxnDStackUnderflow

Test case: push 7864 push 55 great -> 1
Test case: push 23 push 9996 great -> 0
Test case: push 100 great -> data stack underflow
Test case: great -> data stack underflow

istrue

Instruction Breakdown:

byte 0
0x1A

Description: This instruction consumes one item from the data stack and returns nothing on the data stack. If data stack element A is 1 then the instruction immediately proceeding istrue is executed. If stack element A is 0 then the instruction immediately proceeding istrue is skipped and the next instruction is executed. If the data stack is empty when this instruction is called a data stack underflow error occurs with the code pxnDStackUnderflow

Test case: push 1 istrue -> ( the next instruction is executed ) 
Test case: push 0 istrue -> ( the next instruction is skipped over )
Test case: istrue -> data stack underflow

call

ncall

ret

Instruction Breakdown:

byte 0
0x1D

General description: Return from procedure call. Return consumes no items on the data stack. Resume leaves no items on the data stack. This opcode consumes one item from the address stack and assigns it to the instruction pointer.

Control Instructions

halt

Instruction Breakdown:

byte 0
0x1E

This instruction halts the CPU. Operation resumes on hardware reset. A watchdog timer or other physical device may reset the CPU.

reset

Instruction Breakdown:

byte 0
0x1F

This instruction resets the CPU. Procedure is the same as power up.

fpga_stack_machine.txt · Last modified: 2013/04/03 03:22 by millerb
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